TitleProduct

10 Layer Thick Copper PCB

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    Negotiable

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  • Delivery term:

    The date of payment from buyers deliver within days

  • seat:

    Beijing

  • Validity to:

    Long-term effective

  • Last update:

    2021-08-01 01:29

  • Browse the number:

    252

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Hong Kong Ideas Industrial Limited

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Area:Beijing

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Website:http://www.ideaspcb.com/ http://aidies.0356meishi.com/

PRODUCT DETAILS

When 6 wiring layers are required, a 10-layer board should be used. Therefore, a ten-layer board usually has six signal layers and four planes. It is not recommended to have more than 6 signal layers on a 10-layer board.

Ten layers is also the maximum number of layers that can usually be easily manufactured on a 0.062 inch thick board. Occasionally you will see a 0.062 inch thick 12-layer board, but the number of manufacturers that can produce it is limited.

High-level digital plates (10+) require thin media (usually 0.006" or less than 0.062" thick plates), so they are automatically tightly coupled. When stacking and wiring are set up correctly, they can meet all our goals and will have excellent EMC performance and signal integrity.



The below picture shows a very common and nearly ideal ten-layer board stack. The reason why this stack has such good performance is due to the tight coupling between the signal and the return surface, the shielding of the high-speed signal layer, the existence of multiple ground planes, and the tight coupling of the power/ground plane pair in the center of the board.

High-speed signals are usually distributed on the signal layer between the planes (layers 3-4 and 7-8 in this example).


Since the insulating isolation layer between the multilayer boards is very thin, the impedance between the 10 or 12 layers of the circuit board is very low. As long as there is no problem with the layering and stacking, it is completely expected to obtain excellent signal integrity.

Since there is always an insulating layer between the signal layer and the loop layer, the solution of assigning the middle 6 layers to route the signal lines in a 10-layer board design is not the best. In addition, it is important to make the signal layer adjacent to the loop layer, that is, the board layout is signal, ground, signal, signal, power, ground, signal, signal, ground, and signal.

This design provides a good path for the signal current and its loop current. The proper wiring strategy is to route the wires in the X direction on the first layer, the Y directions on the third layer, and the X directions on the fourth layer, and so on. Looking at the routing intuitively, the first layer 1 and the third layer are a pair of layered combinations, the 4th and 7th layers are a pair of layered combinations, and the 8th and 10th layers are the last pair of layered combinations. When it is necessary to change the routing direction, the signal line on the first layer should go to the third layer through the "via" and then change the direction. In fact, it may not always be possible to do this, but as a design concept, it must be followed as much as possible.



Similarly, when the signal routing direction changes, it should go from the 8th and 10th layers or from the 4th to the 7th layer through vias. This wiring ensures the tightest coupling between the forward path of the signal and the loop. For example, if the signal is routed on the first layer and the loop is routed on the second layer and only on the second layer, then the signal on the first layer is transferred to the third layer through the "via". The loop is still on the second layer, so as to maintain the characteristics of low inductance, large capacitance and good electromagnetic shielding performance.

What if the actual wiring is not like this? For example, the signal line on the first layer goes through the via hole to the 10th layer. At this time, the loop signal has to find the ground plane from the 9th layer, and the loop current must find the nearest ground via (such as the ground pin of a resistor or capacitor) . If there happens to be such a via nearby, you are really lucky. If there is no such close via hole available, the inductance will become larger, the capacitance will be reduced, and the EMI will definitely increase.


When the signal line must leave the current pair of wiring layers to other wiring layers through vias, ground vias should be placed nearby the vias so that the loop signal can return to the proper grounding layer smoothly. For the layered combination of layer 4 and layer 7, the signal loop will return from the power layer or ground layer (ie, layer 5 or layer 6), because the capacitive coupling between the power layer and the ground layer is good, and the signal is easy to transmit.



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